2.4GHz CMOS power amplifier design

1 Introduction

In recent years, with the wireless and mobile communications technology, radio frequency integrated circuits has become popular. PA (Power Amplifier, PA) is a radio transceiver system, the largest part of the power loss require components with low noise and high carrier mobility, typically use GaAs technology manufacturing PA, but with the improvement and market integration demand driven, high integration, low-cost CMOS technology will become the development trend of PA [1].

With the advances in CMOS technology, CMOS devices are high-frequency performance has been improved, but also brought some difficulties to the power amplifier, such as oxide breakdown voltage is too low, current driving ability, substrate coupling and serious. Poor performance on-chip passive components, in particular the on-chip inductor Q value is too low, severely affected the power amplifier performance. More practical than 24dBm power amplifier output power can be used in short-range low-power systems such as Bluetooth, WLAN can reduce costs.

In this paper, CMOS technology realization of a work in 2.4GHz RF power amplifier supply voltage 3.3V, output power of 24dBm. This amplifier is more efficient in the C class power amplifier structure, uses a three-amplification, isolation cascade, I / O port impedance matching techniques to improve circuit performance.

2 RF power amplifier

The main task of amplified power amplifier RF signal and transmitted out through its antenna, and ensure that the signal can be properly received, are not damaged by adjacent channel signals. Typically, the efficiency of using leakage level measured PA performance, defined as follows:

2.4GHz CMOS power amplifier design (1)

From (1) style can be seen in the ideal case, if PA itself does not consume power, the power delivered to the load from the power supply should be equal to the power, efficiency 100%. However, PA when the power delivered to the load itself consumes some power, but also a signal conditioning circuit also consumes some additional power, it can not achieve 100% efficiency.

A class of linear PA has, AB class, B class, C class of four types, the main difference is that the bias is different, as shown in Figure 1 can be used to reunification, said the general model [2]. BFL inductance figure into the DC power to the transistor's drain, assuming that the inductor large enough to make through its current remained unchanged. Drain through the capacitor connected to an oscillator circuit BFC to prevent any DC power loads. Inductor L and capacitor C constitute a parallel resonant output filter, reducing the band caused by the non-linear transmit power, transistor output capacitor can be incorporated into the oscillation loop, RL is the equivalent impedance of the antenna will be lower.

2.4GHz CMOS power amplifier design

Figure 1 Linear Power Amplifier Model

PA as an important element of RF transceiver systems require while meeting the linearity, gain, output power and efficiency requirements. However, power supply voltage drops (5V to 3V or lower) limit due to impedance matching, PA also difficult to ensure the required output power and efficiency. The design requirements to achieve the output power of 24dBm, in order to get higher efficiency, select the C type of structure to achieve power amplification [3].

In the C class power amplifier, the gate bias set to make the transistor less than half of the cycle time in turn, drain transistors constituted by the periodic string of pulses of current. Figure 2 for the power amplifier input voltage and drain current waveform, gate bias voltage Vbias is less than the transistor threshold voltage Vth, input sinusoidal signal, the transistor drain conduction angle 2φ get the pulse current. Used to approximate the sine of the top part of the drain current, conduction angle and the available power amplifier drain efficiency and output power of the relationship were

2.4GHz CMOS power amplifier design (2)

2.4GHz CMOS Power Amplifier Design (3)

From formula (2) and (3) can be seen, with the conduction angle decreases, the leakage level efficiency increasing, when the conduction angle is equal to 0, the drain efficiency can reach 100%, but this time the output power of 0. Therefore, C class power amplifier design, the leakage level in accordance with the requirements of efficiency and output power tradeoffs are the size of conduction angle, and then determine the working status of the transistor.

2.4GHz CMOS power amplifier design

Figure 2 C power amplifier ideal voltage and current waveforms

2.1 Input Matching Network Design

Since the input impedance of transistor capacitance and resistance of the series, in order to reduce the input signal reflections, impedance matching must be designed so that the input impedance and the signal source resistance 50Ω matching [4]. Shown in Figure 3, the L1, L2, C2 network composed of T-circuit input impedance and source impedance matching, C1 for the block capacitor, through simulation, the input reflection coefficient was up to-35dB.

2.4GHz CMOS power amplifier design

Figure 3, the input matching network

2.2 Output Matching Network Design

Antenna as the power amplifier's output load, generally equivalent to the resistance of 50Ω, 3.3V power supply voltage can not be provided for the 50Ω load 24dBm output power, it must be carried out impedance conversion, reduced R, to achieve the required power output . Dotted line in Figure 4 the right reason L, C component of impedance transformation network transforms the load resistance of 50Ω to a smaller resistance Rs, the transformation formula

2.4GHz CMOS power amplifier design (4)

The value should be Rs trade-off, value is too large output power can not be required, value is too small, causing the output current is too large, the transistor resistance increases the loss, lower power amplifier efficiency.

2.4GHz CMOS power amplifier design

Figure 4 Structure of the main amplifier

2.3 Main Amplifier Circuit

The main amplifier circuit of the power amplifier shown in Figure 4, with single-ended three-tier structure to achieve amplification. The first level, gain stage, the input signal to 0dBm or less, this class provides the voltage gain is large enough to achieve the input signal voltage amplification; secondary drive level, due to lower levels for large capacitive loads, the lower level must be provided sufficient charge and discharge current, ensure the normal operation of the circuit; finally a power output stage, with a common-source structure to achieve power amplification, get a large output voltage swing. Large size of the transistors used as output control, can reduce the transistor resistance, thereby reducing the transistor's DC loss. However, large output tube also caused difficulties in its input matching, the design must be carefully considered.

In the main amplifier, the transistors M1, M2 and capacitor C5 form the first stage inductor L1, cascode structure provides high voltage gain, common-gate control M2 to reduce output and tuning import tuning the interaction, and reduce the M1 Tube Cgd effects, L1 and C5 resonance at 2.4GHz, to provide high impedance load [5]; M3, M4 inductor L2 form the second level; M5 and L4 for the output power amplifier circuit, due to the size of large output transistor M5, with Inductor L3 and capacitor C3 in series circuit output control input matching design. When capacitor C3 which cut off in DC DC path, and can reduce the effective capacitance gate terminal. B1, B2, B3 for the circuit to provide DC operating point, L2, L4 achieve choke function.

3 results

Design is based on TSMC 0.35μm SiGe CMOS RF technology library, use the company's SpectreRF Cadence simulation tools, power supply take 3.3V. To ensure minimum resistance, the output pipe size to take L = 0.35μm, W = 165 × 11 × 15μm, the output stage bias voltage VB3 = 0.35V.

The input parameters of the simulated reflection curve shown in Figure 5, lower than in the 2.4GHz Office S11-35dB, enter the network-centric in order to 2.4GHz frequency range of 100MHz bandwidth, have reached a good match.

Figure 6 parameters for the power amplifier output power, 0dBm input center frequency at 2.4GHz sinusoidal signal, the amplifier output obtained 250mW output, and the Office of the harmonic power loss is small. The power amplifier efficiency is about 40% leakage level.

2.4GHz CMOS power amplifier design

Figure 5 Input reflection coefficient S11

2.4GHz CMOS power amplifier design

Figure 6, the output power amplifier
4 Conclusion

At low supply voltage, output impedance transformation through increased output power, using the input and interstage matching network reduces reflected power, the main circuit cascade, 3 architecture, the available optimum circuit performance.

Finally, based on TSMC 0.35μm CMOS RF technology, completed a 2.4GHz power amplifier design. Simulation results show that the power supply voltage of 3.3V, 0.35V output stage bias voltage case, the amplifier output power of 24dBm, 40% drain efficiency level can work in the short-range low power RF transceiver system.

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